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Fig R-1: w11a running on a Digilent S3BOARD board with XC3S1000. The rlink connection is via the RS232 port and a FTDI US232R-100 archived on
2010-03-28 cable. The DBB1 kludge card contains a test setup for a FTDI UM232R archived on
2010-03-11 module. (wfjm cc-by-4.0)

Fig R-2: Two of four processors of the 11/74 prototype PHEANX, which was used up to the 90's for RSX builds. Earlier the machine was used under the name CASTOR by DEC RSX Engineering in Maynard. Picture courtesy of Dave Carroll.

Strategy

Long-term goal is to re-create a PDP-11/70mP system. This up to 4 CPU symmetric multiprocessor system was developed in the late '70s by DEC but was never marketed. See article The Never 11's archived on
2016-05-29 . A few prototypes were built, see Figure R-2 for a picture of PHEANX/CASTOR. Some documentation has survived, like the preliminary DEC 11/70mP system manual, see also a historical summary. Full SMP support was added around 1980 to the RSX-11M-PLUS V2.0 operating system, see for example the set and remove affinity system calls in the Executive Manual (STAF$ on p 5-193 and RMAF$ on p 5-128).

The 11/70mP was based on the KB11-CM CPU which was a minimal modification of the KB11-C CPU, used in the 11/70, for basic SMP support. The famous 11/74 was based on the KB11-EM CPU with a much larger microstore and commercial instruction set (CIS) support (see Preliminary 11/74 specification). There are no plans in the w11 project to implement CIS, so the long-term goal is a modest 11/70mP and not a full glory 11/74.

Worth noting in this context is that already in 1972 a 16 node SMP system based on PDP-11 CPU's was built by W. Wulf and G. Bell at Carnegie Mellon, the C.mmp, see their paper "C.mmp--A Multi-mini-processor" for the Fall JCC 1972.

Permanent Tasks

• improve documentation, especially Tcl API
• improve verification, e.g. test benches
• resolve known issues

Short term (in work)

• lots of consolidation
• PiDP-11: support for Oscar Vermeulen's marvelous PiDP-11 front panel.
• via a Digilent CmodC2 (CPLD) based controller PCB. Connects via Pmod cable to any Digilent board.
• via a Trenz TE0725 based PCB. Fully integrated solution.

Mid term

• DEUNA: add loopback, chaining etc; support OS beyond 211bsd
• DZ11: add full modem support

Long term

• FPP Floating Point Processor: The FPP will be asynchronous, with a more efficient coupling than in the original KB11-C CPU plus FP11-C FPP combination.
• new cache system: now write-back, wider cache lines, suitable to build an 11/70MP multiprocessor system. In contrast to the original 11/70MP a state-of-the-art cache coherence will be implemented.
• configurable CPU: make CPU features build-time configurable, for example to generate stripped down w11a versions optimized as an embedded console and IO processor in larger systems.
• stand-alone system: a system with an additional w11a CPU acting as CIOP (console and IO processor) which can be operated without a backend server.
• CPU throttling: some old code, especially tests with timing loops, has problems on a fast machine....

Maybe term

• TOY clock: the time-of-year clock was never part of an 11/70 system, but it is very convenient to have.
• CR11: Card reader; pure nostalgia.
• DU11: Synchronous line interface. Use with IBM 3780 RJE terminal emulation to link to an IBM System/370 mainframe emulated by Hercules; the purest nostalgia
• UDA50: MSCP disk controller, for disks like RA81.

Boards

• Trenz TE0890-01-25-1C: "S7 Mini": lowest cost, w11a with full 4 MB (from 8 MB onboard HyperRAM)
• Trenz TE0725-03-35: low cost, w11a with full 4 MB (from 8 MB onboard HyperRAM). Very attractive for integration with PiDP-11 front panel.
• Both can be easily combined with a TE0790 Xmod FTDI JTAG Adapter which provides JTAG via USB and a fast USB UART as found on current Digilent boards.
• Numato skoll board: Kintex-7 FPGA XC7K70T, still affordable, high speed, expect 50% higher clock rates.

Release plan for w11a